The present invention relates to a semiconductor integrated circuit device, and in particular to a technology effectively applicable to that provided with a memory circuit, such as a static RAM.
As the power consumption of LSIs (Large Scale Integrated circuits) is reduced and the transistors (MOSFETs) in LSIs are microminiaturized, the power supply voltages of LSIs have been lowered. In a 0.13-μm process, for example, LSIs that operate on a power supply voltage of 1.2V are manufactured. In a case where the power supply voltage of LSI is lowered, the following measure is taken to prevent circuit performance (the operating speed of circuit) from being degraded: the threshold voltage (hereafter, abbreviated as “Vth”) of transistors is lowered to increase the current of the transistors. In a 0.13-μm process, for example, MOSFETs whose Vth is 0.4V or so are used. In a transistor low in Vth, a current, called subthreshold current, that is passed between source and drain when a transistor is off is increased. Even when a circuit constructed of that transistor is not operating, this current continues to flow. The current makes a current that is consumed in a state in which LSI is energized but is not operating (hereafter, referred to as “standby state”). In a memory circuit in which data must be stored even in standby state, power supply cannot be interrupted even in standby state. For this reason, the following problem arises in a memory circuit: when transistors constituting the circuit are reduced in Vth, the subthreshold current is increased and this leads to increased power consumption on standby.
In an SRAM (Static Random Access Memory) circuit, consequently, leakage currents can be reduced by controlling source line potential. There are SRAM circuits so constructed that the following is implemented: a circuit that controls source line potential is constructed of three elements, a switch for fixing the potential of source lines at ground potential, a diode connected MOS transistor for determining a potential, and a resistor through which a current is constantly passed; the source line potential in memory cells is thereby controlled without consuming power in a control circuit; a source line potential control circuit with variations in manufacturing process taken into account is obtained by using three elements. An example of such SRAM circuits is disclosed in Japanese Unexamined Patent Publication No. 2004-206745.
[Patent Document 1] Japanese Unexamined Patent Publication No. 2004-206745